Job role: SOC Full chip Timing Lead
Exp: 12- 16 yrs
Location: Hyderabad
Qualifications & experience
You must possess a Bachelor of Engineering degree or Master of Engineering in Electrical and/or Electronics Engineering with 12+ Years of relevant experience with the skills in Timing Closure .
Job Description:
Responsible for schedule & quality goals. Drive & define FCT signoff criteria, setup, flow/methodology, constraints definition & validation, ACIO spec definition & validation & Syn & SD Caliber.
Drive TR to achieve best convergence methodology/flow, globals ( VISA/STF/TAP/DTF ) network definition & IP specific custom checks. Expertise in all FCT Activities (Constraints definition & validation, TFM, efficient ECO methods etc ).
Additional skills include:
If you are interested in applying for this Job role please share your updated resume to sw***i@pe************a.com
Warm Regards
Swathi
sw***i@pe************a.com
PEOPLEplus Professional Services Pvt Ltd is a Bangalore based Staffing and HR & Operations Solutions Provider for domestic and international companies and an acknowledged leader, especially in the R&D and High Technology domains, supporting some of the world’s best companies in identifying so...