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Physical Design Engineer @ Altran Technologies

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 Physical Design Engineer

Job Description

Physical design : 3- 15 years

Location: Bangalore, Hyderabad, Noida, and Coimbatore.

Skills:

Chip level floorplanning, partitioning, timing budget generations, power planning, top PnR, CTS, block integration and ECO generation.

Hands on experience in ICC and primetime.

Block level implementation from netlist to GDS.

Handling timing closure of high frequency blocks.

Expertise in signoff closure Timing with SI and OCV, Power, IR and physical verification at both block and chip level.

Handling blocks of high instance counts 1M instance and above.

Understanding constraints and fixing techniques.

Understanding SI prevention, fixing methodology and implementation.

Proficient in layout edit techniques.

Proficient in Synopsys ICC or Mentor Olympus and Atoptech tool set.

Experience in Design Automation and UNIX system.

Experience in Tcl/ PERL is a plus.


Interested can revert to me @9980538***/as*********e@ca******i.com


Thanks,

Ashiwni

Job Classification

Industry: Electronic Components / Semiconductors
Functional Area: Engineering - Hardware & Networks,
Role Category: Hardware
Role: Hardware
Employement Type: Full time

Education

Under Graduation: Any Graduate
Post Graduation: Any Postgraduate
Doctorate: Doctorate Not Required, Any Doctorate

Contact Details:

Company: Capgemini Engineering
Address: RMZ Ecospace,Block 9B 2nd Floor,Pritech Park SEZ,M, arathahalli VIllage,Bellandur, BANGALORE, Karnataka, India
Location(s): Hyderabad

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Keyskills:   Primetime Physical Verification Floor Planning PNR Timing Closure ICC Design Engineering Physical Design TCL Synopsys

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Altran Technologies

Created in 1982, Altran is today the European Leader in innovation consulting. Operates in 26 countries.

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