Asic/fpga/soc-verification-hyderabad @ Palette Interactive

Job Description

Working experience in functional verification
Experience in SV UVM/OVM Methodology based verification
Understanding design specs, translating them to test plans, creating test environments from
scratch, writing and running tests
Porting test environment/tests from SS to SOC level.
Experience in formal verification techniques with hands-on experience on Jasper/IFV etc.
Knowledge in peripherals such as SATA, PCIe, USB, I2C, SPI is desired
Excellent analytical/debugging skills - Firmware debug, C++ expertise
Firmware debug, boot/chip bring up testing IRQ/connectivity checks using formal methods at chip level
Knowledge of ARM SoC Architectures and AMBA Protocols, bus protocols like AHB/AXI
Knowledge of OCP, AXI-ACE, and NoC would be desirable

Job Classification

Industry: Semiconductors / Electronics,
Functional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip Design,
Role Category: Programming & Design
Role: Programming & Design
Employement Type: Full time

Education

Under Graduation: Any Graduate in Any Specialization, Graduation Not Required
Post Graduation: Any Postgraduate in Any Specialization, Post Graduation Not Required
Doctorate: Doctorate Not Required, Any Doctorate in Any Specialization

Contact Details:

Company: Palette Interactive

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Keyskills:   digital c++ sv c usb soc ovm design verification digital verification design & verification engineer uvm spi sata verilog jasper functional verification test planning debugging ahb asic design verification engineer pcie system verilog firmware