CPU Cores Verification
Exp- 5 to 10 yrs
Location- Bangalore
Np- 15days to Immediate
We have the below requirement for Bangalore location with one position. Can you share some profiles.
CPU Verification Infra engineer
KEY RESPONSIBILITIES
Tool Integration, Code line Integration (the code line will have a mix of components written in C++, Verilog, System Verlig, Perl, Python, Ruby etc ) ;
Porting Code from previous project and Devops related work.
Machine Learning: Should be able to handle large data sets and use/enhance existing training models.
Scripting work and coming up with debug utilities to help CPU Verification Infrastructure, TestPlan, Debug Teams.
Regression Infrastructure management for CPU Verification Team.
Maintenance or development work related to stimulus generation tool/architecture models/checkers/verification components of CPU.
Interact with Feature Verification engineer and understanding the stimulus requirements and scope for enhancement based on coverage etc
Provide help to stakeholders/Feature Verification Engineers on a regular basis for stimulus development.
SKILLS AND EXPERIENCE REQUIREMENTS
B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering
Min 3+ Yrs of experience
Must have knowledge of OOP Concepts , C++. Assembly language will be a plus.
Must be well versed in using Perl and Python.
Well versed with using version control systems like Perforce , Github etc. Should have work experience working in linux environment.
Well versed with writing crons and automating tasks.
Well versed with build/make files.
Good to have Skills: Webservices, API/REST API , DevOps (Javascript, Angular, MySql, NoSql, HTML, PHP), ML (supervised and unsupervised basics, knowledge on handling data sets)
Should be a good team player, quick thinker, pro-active, adaptable & outspoken/approachable. Must communicate well both written and orally.
Must be well-organized and should be able to multitask well with due diligence on closing his/her tasks. Must be a team player.
Basic Knowledge of Verilog, System Verilog is a plus
Basic Knowledge of Pre Silicon Verification (Work experience in Verification domain would be a preferrable).
CPU Architecture and CPU verification knowledge will be a plus.
Academic knowledge of computer architecture, digital electronics, data structures, operating system, compilers.
Keyskills: devops perl github c++ python assembly language oop perforce crons
Magna Infotech is a division of USD 400 + million Quess Group (quesscorp.com) which in turn is a subsidiary of USD 37+ billion - Canadian Multinational, Fairfax Financial Holding Group. Magna Infotech is the largest staff Augmentation and Solutions Company in India, USA and APAC regions. We are a ...