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Senior Verification Engineer Job in Microsoft @ VDart Technologies

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 Senior Verification Engineer Job in Microsoft

Job Description

    Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsofts Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a design verification engineers to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment. Microsofts mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond Responsibilities The AISoC silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner. Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios. Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools Develop tests using UVM or C/C++ Analyse and debug test failures with designers to deliver functionally correct design. Identify and write functional coverage for stimulus and corner cases. Close coverage to plug verification holes and meet tape out requirements. Qualifications 7 or more years of experience in design verification with a proven track record of delivering complex CPU or SoC IPs In depth knowledge of verification principles, testbenches, stimulus generation, and UVM or C++ based test environments. Solid understanding of computer architecture Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments Scripting language such as Python or Perl Desirable Hands on experience in Formal property verification knowledge in high-speed protocols like DDR, PCIe, Ethernet Processor based testbenches and emulation #SCHIEINDIA ,

Employement Category:

Employement Type: Full time
Industry: IT Services & Consulting
Role Category: Not Specified
Functional Area: Not Specified
Role/Responsibilies: Senior Verification Engineer Job in Microsoft

Contact Details:

Company: Microsoft
Location(s): Noida, Gurugram

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Keyskills:   SystemVerilog UVM Python Perl

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VDart Technologies

VDart Technologies Pvt Ltd. supports its $100 Million Client VDart Inc which operates across Major GEO's, Leading IT Clients and Emerging Technologies

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