Lead Verification Engineer Job in Cadence @ Uplers

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. B.Tech/M.Tech (EE) will good knowledge of Digital Logic Systems / Timing Analysis etc Ability to correlate failures with code checkins and triage failures quickly Good Knowledge of Verilog and System verilog is desirable . Good Analytical and Problem solving Skills . Capability to write scripts in bash/tcl/perl/python Familarity with UNIX is a plus , so is knowledge of LSF / SGE/ NC or any other compute farm. Knowledge of emulation and prototyping technologies is a plus . Were doing work that matters. Help us solve what others cant.,

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Keyskills:   Timing Analysis Verilog System Verilog Analytical Skills Bash Perl Python UNIX LSF SGE Emulation Prototyping Tcl