Immediate Opening For DV Engineers @ Synapse Techno Design

1.) IP / SoC SYNTHESIS:

Educational Qualifications: B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.

Relevant Experience: 4 to 7 years

Job Description:

Strong knowledge of SOC design methodologies and flows.

Experience with Lint, CDC.

Experience in Formality.

Experience in Synthesis with DC & Timing closure with Prime Time.

Working knowledge in Low power synthesis and static Power checks is a plus.

Work with RTL and DFT engineers, prepare SoC Top/Block level constraints.

Work closely with SOC Team to achieve full chip timing closure.

Experience in Formality, ECO process, tool flows and scripting.

Knowledge of system-level architecture including buses likeAXI/AHB.

Excellent communication skills.

2.)_ ASIC/SOC Verification:

Educational Qualifications: B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.

Relevant Experience: 4 to 7 years

Job Description:

Should have worked on Full chip/IP Verification and Bring up for Multiple SOC's.

Hands on experience in UVM, SV, OVM, C, C++.

Should have worked on Assertion based , coverage driven verification.

AMBA Bus protocols is a must.

Good scripting skills (TCL/Perl/ruby/python).

Exposure to low power techniques.

Good to have Skills:

Adaptable, Flexible, Global Approach, creative and capable of working independently as well as a team player. Should have a strong sense of urgency.

Solutions orientation, Quality driven, Execution minded, Customer focused

Exposure to Video Codec standards like H.264,VP9,Mpeg4,HDR is a Plus.