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Asic Design Manager - Pune - Marvell India Pvt

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 Asic Design Manager - Pune - Marvell India Pvt

Job Description

The Opportunity
  • MSEE and 10+ years of ASIC experience with at least 5 years of managing a ASIC design team
  • The ASIC management experience should be using the latest tools and design methodologies
  • Experience using Verilog and SystemVerilog.
  • The ability to read block level specifications and understand implementation in RTL.
  • Guide a team that develops block and cluster level design solutions.
  • Ability to work closely with ASIC designers and analog designers who develop IP to be used in ASIC.
  • Ability to interface with the architecture team.
  • Ability to guide post silicon validation and debug.
  • Knowledge of synthesis and netlist simulation is an advantage
  • Knowledge of verification and UVM is an advantage

Job Classification

Industry: Semiconductors, Electronics
Functional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip Design,
Role Category: Programming & Design
Role: Programming & Design
Employement Type: Full time

Education

Under Graduation: Any Graduate in Any Specialization
Post Graduation: Post Graduation Not Required
Doctorate: Doctorate Not Required, Any Doctorate in Any Specialization

Contact Details:

Company: Marvell India
Location(s): Pune

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Keyskills:   ASIC Semiconductor Simulation Analog Verilog Infrastructure ASIC Design UVM Automotive silicon validation

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Marvell

Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world’s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system-level knowledge, Marv...