Applied on:
14/12/2022
Email:
shastrypn...@...
Designation:
Sr.Director/Principal Architec
Qualification:
Ph.D/Doctorate - Electronics/Telecommunication
Score:
80
Experience:
22 - 23 Yrs
Current Salary:
Rs 50 - 75 LPA
Skills:
verilog system verilog , uvm
Resume headline:
Sr. Program Manager ASIC SOC IP
Candidate message:
I PNVM Sastry Prof and Dean worked with various corporates and mNCs industries, r&D governments on VLSI SOC Design Verification ASIC/IP I I have had total 23 Years Experience on same domain VLSI ASIC IP SOC with keen management and technical expertise. My hot areas are System Verilog, Verilog ,UVM ASIC Design Verificication, I am doing PHD JNTUH ECE. my qualifications MS Electronics, PG Dip VLSI, MTech ECE.